Day 3 -

Aug 20th

Stage 2

11:00 - 11:40

Scala Chip Design from Z1R0 to H1R0

Curious about hardware design but think it’s out of reach? This talk proves you can master it with Scala—no prior knowledge needed! We’ll:

  1. Demystify hardware logic design from the ground up, making it accessible to all.
  2. Unveil DFiant HDL (DFHDL), a Scala 3-powered, multi-abstraction hardware description language. With DFHDL’s automation, you’ll craft your own chip and send it to fabrication via Tiny Tapeout (tinytapeout.com, unaffiliated)—a fully open-source workflow.
  3. Spotlight Scala 3 as DFHDL’s secret weapon, leveraging its cutting-edge features like type operations and checks, match types, compiler-plugin, contextual abstraction, named tuples, macros, and more. Real-world examples will showcase how Scala 3 transforms hardware design into a familiar, powerful experience.

From zero to hero, this talk equips Scala devs to conquer silicon!

Oron Port

DFiant

I’m the CEO and co-founder of DFiant, an Electronic Design Automation (EDA) startup that emerged from the Cornell Tech Runway Program. The company is developing shift-left software to streamline logic chip design and verification processes, significantly reducing complexity, time, and cost of chip development.

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